Alireza Rouhi

Alireza Rouhi

PhD

Start: Sep. 2011
Finish: Sep. 2017
Thesis Title: Presenting a process for generating a pattern language verifier
Supervisor: Dr. Bahman Zamani
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About:
Dr. Rouhi received his B.Sc. at Kharazmi University of Tehran in September, 2000; M.Sc. at Sharif University of Technology in June, 2004; and Ph.D. at University of Isfahan in September 2017, all in Software Engineering field. Since February 2018, he has been employed as an assistant professor at Faculty of Information Technology and Computer Engineering, Azarbaijan Shahid Madani University, Tabriz, Iran. He is interested in Software Engineering in general and formal specification of patterns and pattern languages as well as model-driven software engineering in particular.

 

Thesis Abstract:
Design patterns are solutions to recurring design problems in specific contexts. One of the best practices on the application of patterns in practice is the usage of patterns in the form of Pattern Languages (PLs). In a simple definition, a PL is a collection of inter-related patterns which presents a process to solve a specific problem as a whole. One of the major issues which the software engineering community faces is to ensure the correct application of patterns and PLs. In one hand, undoubtedly with the rapid growth of patterns and PLs in number and since the manual verification of the applied patterns and their inter-relationships of PLs are more tedious and error-prone, there is a need to support tools in order to verify an applied PL. On the other hand, despite the popularity of applying PLs in practice, lack of formal model for the patterns’ inter-relationships in general, and PLs in particular, makes development of supporting tools difficult.
According to the stated problem, in this research, based on the algebra of design patterns, a new formal model to specify patterns and PLs is presented. A revision and extension of the Graphic extension of EBNF (GEBNF) notation is presented and applied to model the UML class and sequence diagrams which are required to model the popular design patterns. Also, the formal semantics of the commonly used inter-relationships of patterns is presented which pave the way for presenting our PL formalism. Based on the presented formalism of patterns and PLs, a process, called PLV Generator (PLVGen), is presented which generates a Pattern Language Verifier (PLV) for any given PL assuming it can be specified with the proposed formalism.
To evaluate the PLVGen process, three PLVs were generated automatically for the Broker, Patterns of Enterprise Application Architecture (PofEAA), and the Security PL as case studies. The statistics regarding the generated three PLVs, illustrate the scalability of the PLVGen process. Also, comparing with similar tools, the generated PLVs are more portable, transparent, and free of ambiguities.

 

Current Occupation:
Faculty of Information Technology and Computer Engineering of Azarbaijan Shahid Madani University

 

CV:
http://cv.azaruniv.ac.ir/rouhi

 

Projects

 

Books

 

Papers in English

 

Papers in Persian

 

Technical Reports

 

Contact

Email: Zamani[AT]eng.ui.ac.ir
Tel: +98-31-37934537
Address: Faculty of Software Engineering , University of Isfahan, Hezar Jarib Ave.

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